105MSPS converter streamlines IF sampling
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The ADC14DS105 is a 14-bit, dual ADC with serial Low-Voltage Differential Signaling (LVDS) outputs for communications, test and measurement, and imaging applications. |
This 105MSPS ADC provides
a typical Signal-to-Noise Ratio
(SNR) of 72dB and a Spurious
Free Dynamic Range (SFDR)
of 83dB at a 240MHz input
frequency. This allows high
Intermediate-Frequency (IF)
sampling without an IF stage,
as well as relaxing filtering
constraints and permitting
multi-carrier architectures.
The ADC14DS105 heads a
new family of 16 highbandwidth,
12- and 14-bit
ADCs. The ADC family, with
sample rates from 65MSPS to
105MSPS, features parallel CMOS
or serial LVDS output options. The LVDS outputs
reduce system noise while decreasing the number
of I/O pins and traces, enabling easier signal
routing and flexible system partitioning. For 3G
communication receivers, designers can select 12-
bit products to digitise one or two carriers, or 14-
bit products to digitise three or four carriers
requiring a higher dynamic range.
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APPLICATIONS
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- High IF sampling receivers
- Wireless base station receivers
- Test and measurement equipment
- Communications instrumentation
- Portable instrumentation
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- International Rectifier’s IRS200x drivers, page 070911
- austriamicrosystems’ AS5046 magnetic encoder, page 070907
- National Semiconductor’s, LMH6552 amplifier, page 070932
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