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Analogue input capacitance of 2pF permits sampling at up to 55MHz without requiring a buffer amplifier. The ADC also provides a differential clock input compatible with Positive Emitter- Coupled Logic (PECL) signalling, enabling high-speed operation from a logic-derived clock signal. A sine-wave clock signal can also be used. Integrated features of the TDA8765 include the sample-and-hold amplifier as well as a voltage-controlled regulator. A differential analogue input is also provided, which allows the ADC to be implemented directly in a wide variety of high-speed circuits and applications.
![]() The NXP TDA8765 is featured for easy design-in.
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