Dual Instruction Sets Allow MCU Optimisation
The LPC2460 MCU is built around a
16-bit and 32-bit ARM7TDMI-S CPU
core with real-time debug interfaces
that include both JTAG and
embedded trace.
The LPC2460 can execute both 32-bit ARM
and 16-bit Thumb instructions. Support for
the two instruction sets means engineers can
choose to optimise their application for
either performance or code size at the subroutine
level. When the core executes
instructions in Thumb state it can reduce
code size by more than 30%, with only a
small loss in performance; whereas executing
32-bit ARM instructions maximises core
performance.
The LPC2460 microcontroller is ideal for
multi-purpose and industrial communication
applications. It incorporates a 10/100
Ethernet Media Access Controller (MAC), a
USB full-speed device/host/OTG controller
with 4kbyte of end-point RAM, four UARTs,
two Controller Area Network (CAN) channels,
an SPI interface, two Synchronous Serial Ports
(SSP), three I2C interfaces, and an I2S interface.
A range of features are implemented to
support the collection of serial
communications interfaces, such as on-chip
4MHz internal precision oscillator and
98kbyte of RAM including 16kbyte of SRAM
for general purpose DMA and 2kbyte of
battery-powered SRAM. An External Memory
Controller (EMC) is also included, which
provides support for asynchronous static
memory devices such as RAM, ROM and
Flash, as well as dynamic memories such as
SDRAM.
The MCU also features various 32-bit
timers, an improved 10-bit ADC, a 10-bit
DAC, two PWM units, four external interrupt
pins, and up to 160 fast GPIO lines. The
LPC2460 connects 64 of the GPIO pins to the
hardware-based Vector Interrupt Controller
(VIC), which means these external inputs can
generate edge-triggered interrupts. All of
these features make the LPC2460 particularly
suitable for industrial control systems.
FEATURES
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- 72MHz ARM7TDMI-S processor
- 98kbyte of on-chip SRAM
- Dual Advanced High-performance Bus (AHB)
- Advanced Vectored Interrupt Controller (VIC) supporting up to 32 vectored interrupts
- General-purpose DMA controller
- Ethernet MAC with MII/RMII interface and associated DMA controller
- USB 2.0 full-speed dual-port device/host/OTG controller with on-chip PHY and associated DMA controller
- CAN controller with two channels
- Standard ARM test/debug interface for compatibility with existing tools
- Three reduced-power modes:
Idle, sleep, and power-down
- Two independent power domains for fine tuning of power consumption
- Clock dividers for each peripheral
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APPLICATIONS
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- Industrial control
- Medical systems
- Protocol converters
- Communications
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