Microsemi – Launch of industry’s lowest-power mid- range density FPGA product family

pg_3_Microsemi

microsemi
Microsemi has released its new cost-optimised PolarFireTM Field Programmable Gate Array (FPGA) product family, delivering the industry’s lowest power at mid-range densities, and featuring 12.7Gbits/s Serializer/ Deserializer (SerDes) transceivers as well as best-in-class security and reliability.

The PolarFire chips are the first non-volatile FPGAs to offer power and cost advantages over SRAM FPGAs that include 10Gbits/s transceivers. The new FPGAs provide cost-effective processing capabilities for the growing number of converged 10Gbits/s ports in networking infrastructure, while consuming much less power than competing devices. They also provide a reliable choice for designers concerned about the threat to deep sub-micron SRAM-based FPGAs from Single Event Upsets (SEUs) in their configuration memory.

The PolarFire’s 12.7Gbits/s transceiver is optimised for area and power: total power consumption is less than 90mW at 10Gbits/s. With best-in-class low device static power of 25mW at 100,000 logic elements, zero in-rush current and unique Flash*Freeze mode for best-in-class stand-by power of 130mW at 25°C, PolarFire devices consume as little as half the power of competing FPGAs in the same application.

The FPGA family also provides the industry’s best reliability due to its inherent immunity to configuration SEUs. Additional features that produce higher reliability include built-in single error correction and double error detection, memory interleaving on large static random access memory, and system controller suspend mode for safety-critical designs.

Security features include an Athena TeraFire EXP5200B crypto-processor for secure data communications, and patented differential power analysis countermeasures which protect bitstreams and keys from being deciphered. An integrated Physically Unclonable Function (PUF), 56kbytes of secure embedded non-volatile memory, built-in tamper detectors with custom responses, and true random number generators add to the security capabilities of the PolarFire FPGAs.

Users of the new PolarFire devices can take advantage of Microsemi’s Libero SoC Design Suite, which offers comprehensive, easy-to-learn development tools. The suite includes a complete design flow with Synopsys Synplify Pro synthesis and Mentor Graphics ModelSim Pro mixed-language simulation with best-in-class constraints management, and Microsemi’s differentiated FPGA debugging suite, SmartDebug. Popular IP solutions for 1G Ethernet, 10G Ethernet, JESD204B, DDR3/4 memory interfaces, AXI4 interconnect IPs and more are available for use with PolarFire devices.

FEATURES

  • Multi-gigabit multi-protocol transceivers
  • Up to 481,000 logic elements
  • Up to 33Mbytes of RAM
  • Up to 1,480 18 x 18 multiply-accumulate blocks with hardened pre-adders
  • Integrated dual PCIe interface
  • High-speed I/O supporting DDR4, DDR3L and LPDDR3/DDR3 memories
  • Clock and data recovery on GPIO pins to support SGMII

APPLICATIONS

  • Wireline access networks
  • Cellular telephone infrastructure
  • Defence equipment
  • Commercial aircraft
  • Factory-automation equipment
  • Smart optical communications modules
  • Video broadcast equipment
  • Process control and automation
  • Machine vision processing and analytics
  • Programmable logic controllers
  • Industrial networking
  • Video and image processing

FTM-Board-Club_Stacked
PRE-REGISTER FOR THE POLARFIRE BOARD

This kit is ideally suited for high-speed transceiver evaluation. A 300,000 logic element PolarFire FPGA with DDR4, DDR3, an FMC connector and Ethernet ports enables development of a broad range of high- performance designs.

Orderable Part Number: MPF300-EVAL-KIT

Leave a Reply

Your email address will not be published. Required fields are marked *

Protected by WP Anti Spam