STMicroelectronics – How an MCU’s accelerator block renders sophisticated 2D graphics without affecting the CPU

The pressure of a competitive market is driving OEMs to dramatically enhance the user interface of many industrial, automotive and medical devices, in order to provide a user experience similar to that of a contemporary smartphone or tablet. Typically this calls for the implementation of sophisticated 2D graphics in a relatively large and high-resolution touchscreen display, potentially alongside other advanced interface technologies such as speech recognition and gesture sensing.

Fortunately for designers who wish to continue operating in a familiar microcontroller environment rather than migrating to an applications processor, STMicroelectronics has introduced special graphics- processing features into its high-end products to enable them to support sophisticated graphics applications without compromising their execution of the core application code.

This has been achieved through the provision of additional hardware intellectual property, the Chrom-ARTTM graphics accelerator, alongside the ARM® Cortex®-M7 or ARM Cortex-M4 core in its STM32F7, STM32H7, STM32F4 and STM32L4 series of MCUs. The Chrom-ART block enables graphics processing functions to be offloaded from the MCU’s CPU, leaving it free to run the core application in real time.

This Design Note describes the main features and capabilities of the Chrom-ART block, and the types of graphics functions that it supports.

The capabilities of the Chrom-ART block
The Chrom-ART accelerator is a specialised Direct Memory Access (DMA) unit dedicated to image manipulation, as shown in Figure 1. It can perform the following operations:
• Filling a part or the whole of a destination image with a specific colour
• Copying a part or the whole of a source image into a part or the whole of a destination image
• Copying a part or the whole of a source image into a part or the whole of a destination image with a pixel format conversion
• Blending a part of and/or two complete source images with a different pixel format, and copying the result into a part or the whole of a destination image with a different colour format

All the traditional colour coding schemes are supported from 4 bits up to 32 bits per pixel, in indexed or direct colour mode. The Chrom-ART block has its own dedicated memories for Colour Look-Up Tables (CLUTs).


Fig. 1: Block diagram of the Chrom-ART accelerator block in STM32L4 MCUs. (Image credit: STMicroelectronics RM0351)

The accelerator offloads most graphics operations at a throughput of one pixel per cycle. It is fully integrated into the graphics firmware that runs on ST’s MCUs, making its operation in software transparent to the user.

As a type of DMA unit, the Chrom-ART block performs functions through memory operations, for which it offers four modes:
• Register-to-memory for rectangle-filling operations
• Memory-to-memory for 2D memory copy operations
• Memory-to-memory with pixel format conversion, for bitmap drawing with format conversion
• Memory-to-memory with pixel format conversion and blending, for bitmap or text drawing with transparency

The user can programme independently all of the parameters for the source and the destination, that is, the address of the layer including its size and position; the colour format; and the way in which transparency is managed.

The Chrom-ART block may be used to efficiently manage text and fonts. Only the transparency value is stored in memory for rendering anti- aliased fonts – anti-aliasing is a method for smoothing the appearance of text which might otherwise appear pixellated or ‘blocky’. The colour is added during the pixel-format conversion, and may be programmed by the user. This mode of operation offers a very efficient way to store high- quality bitmap fonts.

Blending operations are performed completely in hardware. The Chrom-ART accelerator can blend a foreground image and a background image with transparency. One pixel is generated per cycle, making this complex operation much more efficient than if it were done by the CPU. The resulting pixel may be coded independently of the sources thanks to the output pixel-format converter.

The Chrom-ART accelerator also has six interrupt sources. These are used to signal:
• Configuration errors
• CLUT transfer complete
• CLUT access error
• Watermark reached during a transfer
• Transfer complete
• Transfer error

Operation of the Chrom-ART accelerator is consistent with users’ power-saving strategies. It is active in the MCU’s run and sleep modes, and a Chrom-ART interrupt can trigger the MCU to exit sleep mode. In stop (power-down) mode, the Chrom-ART accelerator is frozen, and its registers’ content is retained. In stand-by mode, the accelerator is powered down, and it must be re-initialised before it can begin operation again.

To sum up, the Chrom-ART block is used in every graphics implementation to compute the frame buffer without any burden on the CPU, providing a very efficient throughput.

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